Low-noise amplifiers (LNAs) are invaluable for increasing the sensitivity and range of a microwave receiver. For applications at 4.9 to 6.0 GHz, which include IEEE 802.11a, HiperLAN2, and HiSWANa wireless-local-area-network (WLAN) receivers, a two-stage design based on enhancement-mode, pseudomorphic high-electron-mobility-transistor (E-pHEMT) device technology delivers 22 dB gain at 5.5 GHz, with a low noise figure of 1.4 dB and +11.5-dBm output power at 1-dB compression. The amplifier provides an output third-order intercept point of +28 dBm.

With its broad frequency range, this LNA design can be applied to WLAN receivers in North America, Europe, and Japan. These bands include 5.15 to 5.35 GHz and 5.725 to 5.825 GHz in North America (802.11a), 5.15 to 5.35 GHz ad 5.470 to 5.725 GHz in Europe (HiperLAN), ad 5.15 to 5.25 GHz in Japan (HiSWANa). The amplifier is designed around the model ATF-551M4 low-noise E-pHEMT transistor from Agilent Technologies for both stages (a data sheet can be downloaded from http://literature.agilent.com/litweb/pdf/5988-9006EN.pdf). The transistor, which features a 400-µm gate width for low noise and high intercept point from 2 to 10 GHz, is housed in a leadless surface-mount plastic package that measures 1.4 3 1.2 3 0.7 mm.

Besides having a very low typical noise figure (0.5 dB), the ATF-551M4 is specified at 2 GHz and 2.7-V bias to provide a +24.1-dBm output third-order intercept point (OIP₃) at 10 mA drain current. The advantage of an E-pHEMT versus a depletion-mode pHEMT is that biasing the device is simplified by the fact that the E-pHEMT requires a positive voltage on the gate for normal biasing as opposed to a negative voltage for a depletion-mode pHEMT. Biasing an E-pHEMT requires a simple voltage divider from the drain to supply a small positive voltage to the gate for nominal drain current.

To meet the goals for noise figure and gain, drain source current (I_ds) was chosen to be 15 mA. According to the device data sheet, this value provides good IP₃ combined with a very low minimum noise figure. The data sheet also indicates that a 2.7-V drain-to-source voltage (V_ds) gives a slightly higher gain and easily allows the use of a regulated 3.3-V supply.

Using the EEsof Advanced Design System (ADS) software from Agilent Technologies, the amplifier circuit can be simulated in both linear and nonlinear modes of operation. For the linear analysis, the transistors can be modeled with a two-port S-parameter file in the Touchstone file format: file ATF551M4.s2p can be downloaded from the Agilent Wireless Design Center website (http://www.agilent.com/
view/rf). In addition to information regarding gain, noise figure, and input/output return loss, the simulation provides important insight into circuit stability. The computer simulation simplifies the calculation of the Rollett stability factor (K) and eases the creation of stability circles.

ADS's nominal optimization (also known as performance optimization) tool was used to select the values of supporting components for optimum performance. This tool can be used to modify a set of parameter values to satisfy predetermined performance goals by comparing computed and desired responses and modifying design parameter values to bring the computed response closer to target performance. Nominal optimization is available in the ADS simulator for analog/RF systems simulation using any analysis type, such as AC, DC, S-parameter, harmonic-balance, circuit-envelope, and transient simulations. Goals were set for gain, noise figure and return loss over the 4.9-to-6.0-GHz band, out-of-band gain, as well as for unconditional stability from 0.1 to 18 GHz. An example of nominal optimization, optex1_prj, is available in Chapter 2 of the ADS help library under tuning, optimization, and statistical design.

Accurate equivalent-circuit models for the resistors, inductors, and capacitors are required for the optimization tool to work at 6 GHz. These models must include package parasitic inductance, resistance, and capacitance, which allows the component values to be varied over a small range using the optimization tool and accurately correlate to measured data. Examples of passive component models and ADS optimization tool terminology are shown in Fig. 1. It should be noted that each manufacturer's passive elements exhibit slightly different parasitic properties.

A demonstration board (Fig. 2) was developed primarily for 5-to-6-GHz applications. The printed-circuit board (PCB) is a three-layer configuration for rigidity. The top layer is the signal layer, which is 0.010-in.-thick FR4 with a dielectric constant of 4.2. The second and third layers are included for rigidity. The board utilizes small EIA 0402 [0.04 3 0.02 in. (1.0 3 1.5 mm nominal)] form-factor surface-mount components. The use of microstrip lines in place of the 0402 inductors would reduce circuit losses but would produce a larger layout. The actual 6 3 15 mm area required for the circuitry is outlined in blue.

Figure 3 shows a schematic diagram of the two-stage amplifier. The amplifier uses a bandpass network for input matching and a highpass network for output matching. Interstage matching is provided by a highpass network.

The input network represents a compromise between best noise figure and reasonable input return loss, and consists of series capacitor C1, shunt inductor L1, and shunt capacitor C12. By using the demonstration board layout shown, the mounting pads before L1 will have to be bridged with copper foil: the mounting pads are included to allow for a lowpass impedance matching network topology.