Low-noise amplifiers (LNAs) are critical for extracting signals from noise in communications receivers. Other techniques are available for controlling noise in a system, including filtering and cryogenic cooling, but high-performance LNAs offer a proven, reliable means of managing communications system noise. What follows is an exploration into the design of a low-power (battery-operated) LNA operating at X-band (8 GHz). The design compares the use of GaAs PHEMT enhancement-mode (E-mode) and depletion-mode (D-mode) transistors in a monolithic-microwave-integrated-circuit (MMIC) structure with the goal of operating on a few milliwatts of DC power.

This low-power operating goal is incompatible with applications dealing with undesired ( blocking) signals. Such applications require stringent filtering and/or LNAs with excellent linearity in the form of high third-order intercept point (IP3). Still, many wireless applications, such as Global Positioning System (GPS) receivers, can make use of a low-power LNA to boost weak signals where there is not the presence of interfering or blocking signals.

The GaAs PHEMTs under consideration for the LNA design are available in two different device profiles: D-mode, with a typical negative gate threshold voltage and E-mode, with a positive gate threshold voltage. The positive threshold voltage simplifies biasing in a battery-powered system. While it is possible to use a single battery to power a D-mode device, this requires consumption of additional DC power into a source resistor to meet the biasing requirements.

In designing the LNA, the first step is to decide which profile provides the best combination of features and performance. The next step is to choose device size. Device size will affect the LNA's bandwidth, DC power consumption, noise figure, and nonlinear performance. For first-order effects, device size should not affect gain and noise figure. However, as the device gets smaller, resistive losses for matching circuits and interconnections will increase relative to the device impedance, effectively increasing the noise figure.

The choice of device size is a critical step in designing a MMIC LNA. The drain bias current affects the noise figure more so than the drain voltage. Additionally, drain bias affects amplifier gain. With insufficient current, gain will be low. Typically, LNAs are biased at 15 to 20 percent of the drain saturation current (IDSS) as a compromise between gain and noise. The IDSS scales with device size, so a larger device will consume more power than a smaller device. One way to reduce DC power consumption is by reducing the device size while maintaining a 15 to 20 percent IDSS bias.

Decreasing the drain voltage will reduce DC power consumption, but the drain voltage must be high enough for the device to operate in its saturation region and enable amplification. In addition to an increased noise figure and reduced gain as a device shrinks, there are other drawbacks in using a too-small device. These include nonlinear effects and susceptibility to interfering signals within the operating bandwidth due to poor IP3 performance. There is also a range of device sizes that is best suited for matching to 50-ohm systems. Devices smaller or larger than this optimal range will tend to reduce bandwidth, perhaps not a concern in narrowband applications but certainly important in more wide-band systems. Thus, the intuitive tendency to make the device as small as possible for reduced power consumption is tempered by other performance issues. Thus, a power consumption goal of a few milliwatts was set for the design.

Once device size, bias current, and bias voltage have been chosen, the next step is to design the LNA's matching circuits. Nonlinear and linear device models or S-parameters are generally available for a typical device, but these are optimized for a specific device size, such as 300 µm. Errors increase as the device is scaled upward or downward, although it is often unclear how much the error increases due to this model scaling. Matching circuits are designed using a simulator and the appropriate device model. An iterative design flow is used to develop the LNA design along with the circuit layout, and various checks are performed along the way. Finally, layout design-rule checks (DRCs) are performed before sending the design out for fabrication.

Figure 1 and 2 show the nearly identical layouts of the D-mode and E-mode LNAs, respectively. Because the GaAs fabrication process is equivalent for both devices other than the doping profile, only a slight tweak in the matching circuits was required to optimize the Dmode design versus the E-mode design. Although both designs were optimized for a single bias point, tests were made over a range of voltages and currents to determine performance capabilities and DC power-consumption limits.

While the two LNAs are nearly identical in layout, simulations show better performance for the E-mode PHEMT for the same DC power consumption. Based on computer simulations, the gain, noise figure, and output power at 1-dB compression (P1dB) are better for the Emode design than for the D-mode PHEMT design. Table 1 compares the two LNAs at various DC bias points.

From the simulations, it would appear that gain is typically 2 dB higher for the E-mode LNA than the D-mode LNA for the same DC power consumption. Likewise, the noise figure is typically 0.3 dB better for the E-mode device than for the D-mode device. While the E-mode device appears to provide more output power at 1-dB compression, its DC power consumption increases at higher input power levels making this an unfair comparison. The input and output impedance matching for the two LNAs is nearly identical.

Measured results will show whether the E-mode device performs better than the D-mode device in the low-power LNA design. In comparing the results, note that MMIC process variations can skew the results for the two LNAs unevenly for a single-wafer sample. Simulations are based on statistically average devices. Variations in the PHEMT active layer (i.e., threshold) doping profile is a major cause of what may be evidenced as performance variations between the two devices. Fortunately, all the matching circuits and passive device variations— microstrip lines, inductors, capacitors, and resistors—in the two LNA designs will be virtually identical for the comparisons.

The LNA based on the E-mode device boasts more gain and better noise figure at a comparable DC power consumption level than the LNA based on the Dmode device. Measurements were made of the output power at 1-dB compression (P1dB), noise figure (NF), gain (S21), and impedance match (S11, S22) with the results shown in Table 2.