Communications-system design is complex, requiring practical and powerful design tools. Complex interactions between RF components, baseband signal processors, and increasingly complex modulation schemes can challenge even the most experienced designer. Fortunately, modern electronic-design-automation (EDA) technology can help overcome these challenges with a more seamless design flow. What follows is an examination of a top-down/bottom-up design-flow approach based on the use of advanced EDA tools. To demonstrate the approach, an IEEE 802.11a wireless local-area-network (WLAN) integrated-circuit (IC) design will be used as an example, although the principles are applicable to other communications standards and other design topologies, such as RF printed-circuit boards (PCBs) and multichip modules (MCMs).

To create a communications architecture, an engineer must consider the technical boundary conditions of the physical layer (PHY). Consider a WLAN based on offset frequency-division-multiplex (OFDM) signals. Data rates to 54 Mb/s are achieved by using higher-order quadrature-amplitude-modulation (QAM) formats and 53 subcarriers that share frequency spectrum with adjacent orthogonal subcarriers. With these lower-rate parallel subcarriers, the relative amount of time dispersion caused by delay spread is decreased, and with an adequate guard interval, intersymbol interference (ISI) is almost eliminated. While these characteristics make for a high-speed communications link, they also introduce design challenges:

1. Sensitivity to frequency offset—good frequency correction is needed in the receiver (Rx) to ensure good inter-carrier interference performance (ICI).
2. Sensitivity to oscillator phase noise for best bit-error rate (BER) at high order QAM.
3. Channel estimation is used to detect and remove delay spread.
4. The complexity of inverse Fast Fourier transform/Fast Fourier transform (IFFT/FFT) required to optimize latency and performance.
5. Maintaining orthogonality under high-power conditions.
6. High peak to average ratios strain power-amplifier (PA) performance.

Due to the complex modulation scheme of OFDM signals, with multiple subcarriers and critical timing requirements, performance of the system cannot be determined unless the modulation is considered, circuit interactions are taken into account, and RF/baseband interactions are evaluated. Considering the issues, it is no wonder that communications-system design is complex and time consuming. But if an EDA tool has a design and verification environment that is tailored to the communications standard, a designer should be able to generate a viable design is less time, and quickly verify it to obtain the best chance at a first-pass success.

The basic system design flow is a top-down, bottom-up design flow following these steps:

High-level architecture

Base-system design

Optimize system design

System verification

Functional block/circuit design

Functional block verification

Lower-level implementation

This top-to-bottom flow involves RF and analog-mixed-signal (AMS) design that can be used for RF system/baseband and digital-signal-processing (DSP)/baseband system designs, which are typically designed in parallel. For RF/mixed-signal IC applications, this design flow is currently undergoing further refinement by Agilent Technologies (Santa Rosa, CA) and Cadence Design Systems (San Jose, CA) as part of a five-year technology alliance announced in February.

To handle the WLAN example, Agilent Ptolemy, a dataflow manager with embedded system design capability that is available in the Advanced Design System (ADS) design environment from Agilent Technologies, will be used. The ADS design and verification environment library available for WLAN 802.11a will also be used.

Before proceeding, it might help to review some of the EDA tool attributes (see table) that should be examined prior to taking on a complex design such as a WLAN. RF/baseband and DSP/baseband engineers typically collaborate to determine architecture partitioning. Algorithm-based tools and spreadsheets play an important role in this design area and it is often desirable to import or re-use these algorithms in the system-design tool. Since each communications standard (such as IEEE 802.11) puts different constraints on the system design, intellectual-property (IP) reuse from one system to another will be minimal in many cases, although it would be desirable to have access to IP specific to an application to speed the design process. Fortunately, within ADS, the Agilent WLAN Design Library and WLAN DesignGuide provide much of the needed application-specific expertise to simplify a WLAN design.

A rough idea of the RF/mixed-signal design partitioning can usually be developed early in the conceptual design phase. To speed this process, a reference Rx, for example, is available in the WLAN DesignGuide that can be used as a baseline in establishing an architecture for the WLAN Rx. In this case, a zero-intermediate-frequency (IF) Rx is suggested. The architecture allows a significant simplification and reduction in analog parts count, and increases flexibility of the Rx. In terms of specific design advantages, this architecture also simplifies the frequency-offset problem encountered in WLAN designs by reducing the number of elements that contribute to frequency errors.