Low-temperature-cofired-ceramic (LTCC) technology offers the means to integrate active and passive components on compact modules for both commercial and military applications. This elegant technology can provide tremendous benefits in terms of high performance and small size, but requires careful design discipline to achieve repeatable results. Fortunately, a novel procedure using Ansoft Designer from Ansoft (Pittsburgh, PA) allows passive and active modules such as power amplifiers (PAs), RF switches, and RF front-ends to be designed quickly and easily on LTCC substrates.

An LTCC process can integrate capacitors, resistors, and inductors in a very small area, while allowing active devices such as RF integrated circuits (RF ICs), monolithic microwave integrated circuits (MMICs), and surface-mount devices to be mounted on them. Once completed, the process produces a mechanically strong, hermetically sealed, thermally conductive, chemically inert, and dimensionally stable structure with high yield. However, designers face significant challenges when designing components with the LTCC process. Fortunately, the use of the latest design tools such Ansoft Designer can overcome these challenges, while providing a high level of confidence in the viability of the result.

Many challenges face designers working with LTCC, including the need for RF characterization of internal structures that lack electrical models. Most embedded components, especially spiral inductors and parallel plate capacitors, are large in area. Parasitic coupling from such large structures with other structures or to ground planes is often significant. The process for characterizing passive devices must include parasitic effects, not only to determine passive component values, but also to evaluate any unintentional or intentional coupling to other structures. Reliable RF characterization of these coupling mechanisms must be developed to ensure design success. It is also important to generate a component library so that often-used components can be readily incorporated into future designs.

Ansoft Designer combines the company's High Frequency Structure Simulator (HFSS) simulation tool for characterizing three-dimensional (3D) structures with system, circuit, and planar EM simulation. The combination makes the tool well suited for LTCC design and development because it includes the rigorous EM simulation required for RF characterization.

Various technologies are required to design integrated LTCC modules. EM-based simulation is used for characterization of passive elements and circuit simulation is used for RF module design and optimization. Model library development is accomplished using an integrated equivalent-circuit extraction capability. In addition, the system simulation integrated within Ansoft Designer allows users to fully characterize the design at the system level.

Planar EM is a 3D planar field solver based upon method-of-moments (MoM) techniques. With its singular-value-decomposition (SVD) FastSolve technology, Planar EM can simulate very complex structures, allowing designers to characterize the complexities found in LTCC modules. HFSS can be used to examine structures that are not strictly planar, and can perform packaging analysis, making it possible to characterize the effects of module interconnection to a higher-level assembly.

The procedure for building embedded passive models and an embedded passive model library is the same for LTCC modules and for printed-circuit boards (PCBs). The procedure begins with physical model analysis using some form of EM simulation. HFSS, Planar EM, or Spicelink 3D can be used to extract electrical performance. HFSS is a full-wave 3D solver and should be used for high frequencies and complex geometries. Often the embedded passive devices are predominantly planar in nature with minimal coupling to other 3D elements. In this case, the built-in Designer Planar EM is the best choice. Spicelink 3D is similar to HFSS; however, it is based upon a static field solution. It typically completes simulation faster than HFSS and should be used whenever the structure is small compared to wavelength.

The next step in model development is to select an equivalent-circuit model. Often a simple pi or T network is sufficient for small two-terminal devices. Optimization engines within Ansoft Designer automatically adjust equivalent-circuit parameters until circuit performance matches the EM simulation extracted electrical performance.

An embedded capacitor geometry and its associated equivalent circuit are shown in Fig. 1(a). The geometry is a simple parallel-plate structure. The equivalent circuit includes parasitic resistance and inductance as well as fringing capacitances. Parallel capacitance value and parallel parasitic parameter values can be found by fitting the S-parameters between the equivalent-circuit model and performing HFSS 3D simulation within the proper frequency range. The Q value can be calculated from a terminated one-port Z₁₁ parameter using Q = mag[imag(Z₁₁)/real(Z₁₁)]. The self-resonance frequency (F_r) should be investigated for any capacitor because the reactance value of may not be capacitive at frequencies above the resonance frequency.

Figure 1(b) shows the variation of capacitance value of the embedded capacitor in terms of the overlapped area between parallel plates, along with the parasitic inductance and resistance values. Ansoft Designer can use this graph to obtain the required capacitance value by embedded parallel plates, and results from the analysis can be used to construct a capacitor library for frequently used values.

Similarly, Fig. 2(a) shows the geometry for an embedded inductor based on a simple, single-layer spiral structure along with its equivalent circuit. The equivalent circuit includes parasitic series resistance and a shunt capacitance. As with the embedded capacitor, the S-parameters found from a 3D HFSS simulation are used in an optimization to find the inductance and the parasitic resistance and capacitance across a desired frequency range. The inductor Q can be calculated from terminated one-port Z₁₁ parameter using Q = mag[imag(Z₁₁)/real(Z₁₁)]. An inductor also has a self-resonance that should be investigated so that the inductor is used below this frequency.

Inductance versus the number of turns of the embedded spiral inductor is extracted in the analysis and shown in Fig. 2(b). Ansoft Designer can use this data to obtain required inductance values for embedded inductors. This data, coupled with the parasitic capacitance and resistance values, can be used to construct an inductor library for frequently used values.